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   exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 sp3203e 3v rs-232 serial transceiver with logic selector and 15kv esd protection features ? 3 driver / 2 receiver architecture ? logic selector function (v l ) sets ttl input/output levels for mixed logic systems ? meets true eia/tia-232-f standards from a +3.0v to +5.5v power supply ? interoperable with eia/tia-232 and adheres to eia/tia-562 down to a +2.7v power source ? minimum 250kbps data rate under load ? regulated charge pump yields stable rs-232 outputs regardless of v cc variations ? esd specifcations: + 5kv human body model + 5kv iec6 000-4-2 air discharge + 8kv iec6000-4-2 contact discharge ? applications ? palmtops ? cell phone data cables ? pda's description now available in lead free packaging v- 1 2 3 4 17 18 19 20 5 6 7 16 15 14 shutdown c1+ v+ c1- c2+ c2- t 2 out gnd vcc t 1 out r 1 out 8 9 10 11 12 13 r 1 in r 2 out sp3203e t 2 in r 2 in v l t 3 out t 3 in t 1 in the sp3203e provides a rs-232 transceiver solution for portable and hand-held applications such as palmtops, pda's and cell phones. the sp3203e uses an internal high-effciency, charge-pump power supply that requires only 0.  f capacitors during 3.3v operation. this charge pump and exar's driver architecture allow the sp3203e to deliver compliant rs-232 performance from a single power supply ranging from +3.0v to +5.5v. the sp3203e is a 3-driver/2-receiver device, with a unique v l pin to program the ttl input and output logic levels to allow inter operation in mixed-logic voltage systems such as pda's and cell phones. receiver outputs will not exceed v l for v oh and transmitter input logic levels are scaled by the magnitude of the v l input.
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 2 absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifcations below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc .......................................................-0.3v to +6.0v v+ (note ).......................................-0.3v to +7.0v v- (note )........................................+0.3v to -7.0v v+ + |v-| (note )...........................................+3v i cc (dc v cc or gnd current)......................... + 00ma input voltages txin, shutdown .........................-0.3v to v l +0.3v rxin................................................................... + 25v output voltages txout............................................................. + 3.2v rxout, .......................................-0.3v to (v l + 0.3v) short-circuit duration txout......................................................continuous storage temperature.......................-65c to + 50c power dissipation per package 20-pin tssop (derate 7.0mw/ o c above +70 o c..560mw note 1: v+ and v- can have maximum magnitudes of 7v, but their absolute difference cannot exceed  3v. v cc = v l = +3.0v to +5.5v, c  - c4 = 0. f, tested at +3.3v +/-0%, c = 0.047f, c2 - c4 = 0.33f, tested at +5.0v +/- 0%, t amb = t min to t max , unless otherwise noted. typical values are at vcc = v l = 3.3v, t a = +25oc. electrical characteristics parameter min. typ. max. units conditions dc characteristics (vcc = +3.3v or +5v, ta = +25oc) supply current 0.3  ma shutdown = vcc, no load supply current, shutdown .0 0.0 a shutdown = gnd logic inputs input logic threshold low 0.8 v txin , shutdown v l = 3.3v or 5.0v 0.6 v v l = 2.5v input logic threshold high 2.4 v txin , shutdown v l = 5.0v 2.0 v l = 3.3v .4 v l = 2.5v 0.9 v l = .8v transmitter input hysteresis 0.5 v input leakage current +/-0.0 +/-.0 a txin, shutdown receiver outputs output leakage current +/-0.05 +/-0 a rxout, receivers disabled output voltage low 0.4 v i out = .6ma output voltage high v l - 0.6 v l - 0. v i out = -.0ma
3 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 v cc = v l = +3.0v to +5.5v, c  - c4 = 0. f, tested at +3.3v +/-0%, c = 0.047f, c2 - c4 = 0.33f, tested at +5.0v +/- 0%, t amb = t min to t max , unless otherwise noted. typical values are at vcc = v l = 3.3v, t a = +25oc. electrical characteristics parameter min. typ. max. units conditions receiver inputs input voltage range -25 +25 v input threshold low 0.8 .5 v t a = +25oc v l = 5.0v 0.6 .2 v v l = 2.5v or 3.3v input threshold high .8 2.4 v t a = +25oc v l = 5.0v .5 2.4 v v l = 2.5v or 3.3v input hysteresis 0.5 v input resistance 3 5 7 k ? transmitter outputs output voltage swing +/-5.0 +/-5.4 v all transmitter outputs loaded with 3k? to gnd, t amb = +25oc output resistance 300 0m ? vcc = v+ = v- = 0v, vout = +/-2v output short-circuit current +/-60 ma vout = 0v output leakage current +/-25 a vcc = 0v or 3.0v to 5.5v, vout = +/-  2v, driver disabled esd protection rxin, txout +/-5 kv human body model +/-5 kv iec 6 000-4-2 air gap discharge +/-8 kv iec 6000-4-2 contact discharge
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 4 unless otherwise noted, the following specifcations apply for v cc = +3.0v to +5.5v with t amb = t min to t max . typical values apply at v cc = +3.3v or +5.0v and t amb = 25 c. timing characteristics parameter min. typ. max. units conditions maximum data rate 250 kbps r l = 3k?, c l =  000pf, one transmitter switching receiver propagation delay, t phl 0.5 s receiver input to receiver output, c l = 50pf receiver propagation delay, t plh 0.5 receiver output enable time 200 ns normal operation receiver output disable time 200 ns normal operation time to exit shutdown 00 s v txout > 3.7v transmitter skew t phl - t plh 00 ns (note 2) receiver skew t phl - t plh 50 ns transition-region slew rate 6 30 v/s c l = 50pf to 000pf vcc = 3.3v, t amb = 25 c, rl = 3 k ? to 7k ?, measure - ments taken from -3.0v to +3.0v or +3.0v to -3.0v 4 30 c l = 50pf to 2500pf note 2. transmitter skew is measured at the transmitter zero crosspoint.
5 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 figure  . sp3203e typical operating circuit typical operating circuit sp3203e 1 3 5 4 2 6 19 gnd t 1 in t 2 in c1+ c1- c2+ c2- v+ v- v cc 7 8 + c2 c5 c1 + + c3 c4 + + 17 16 rs-232 outputs rs-232 inputs ttl/cmos inputs +3v to +5.5v 18 5k ? r 1 out 11 14 5k ? r 2 in r 2 out 10 13 ttl/cmos outputs r 1 in t 2 out t 1 out shutdown 20 12 v l t 3 in 9 15 t 3 out 0.1 f 0.1 f 0.1 f 0.1 f 0.1 f
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 6 pin description name function pin # c+ positive terminal of the voltage doubler charge-pump capacitor  v+ regulated +5.5v output generated by charge pump 2 c- negative terminal of the voltage doubler charge-pump capacitor 3 c2+ positive terminal of the inverting charge-pump capacitor 4 c2- negative terminal of the inverting charge-pump capacitor 5 v- regulated -5.5v output generated by charge pump 6 t  in ttl/cmos driver input 7 t 2 in ttl/cmos driver input 8 t 3 in ttl/cmos driver input 9 r 2 out ttl/cmos receiver output 0 r  out ttl/cmos receiver output  v l logic-level supply voltage selection 2 r 2 in rs-232 receiver input 3 r  in rs-232 receiver input 4 t 3 out rs-232 driver output 5 t 2 out rs-232 driver output 6 t  out rs-232 driver output 7 gnd ground 8 vcc +3.0v to +5.5v supply voltage 9 shutdown apply logic low to shut down drivers and charge pump. 20
7 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 description the sp3203e is a 3-driver/2-receiver device ideal for portable or handheld applications. the sp3203e transceivers meet the eia/ tia-232 and itu-t v.28/v.24 communication protocols and can be implemented in battery- powered, portable, or handheld applications such as notebook or palmtop computers, pda's and cell phones. the sp3203e device features exar's proprietary and patented (u.s.-- 5,306,954) on-board charge pump circuitry that generates 5.5v rs-232 volt - age levels from a single +3.0v to +5.5v power supply. the sp3203e can operate at a minimum data rate of 250kbps. theory of operation the sp3203e is made up of four basic circuit blocks:  . drivers, 2. receivers, 3. the exar propri - etary charge pump, and 4. v l circuitry. drivers the drivers are inverting level transmitters that convert ttl or cmos logic levels to 5.0v eia/tia-232 levels with an inverted sense relative to the input logic levels. typically, the rs-232 output voltage swing is + 5.4v with no load and + 5v minimum fully loaded. the driver outputs are protected against infnite short-circuits to ground without degradation in reliability. these drivers comply with the eia-tia-232f and all previous rs-232 ver - sions. the driver output stages are turned off (high impedance) when the device is in shutdown mode. the drivers can guarantee output data rates fully loaded with 3k? in parallel with 1000pf, ensuring compatibility with pc-to-pc com - munication software. the slew rate of the driver output is internally limited to a maximum of 30v/s in order to meet the eia standards (eia rs-232d 2. .7, paragraph 5). the transition of the loaded output from high to low also meets the monotonicity requirements of the standard. figure 2 shows a loopback test circuit used to test the rs-232 drivers. figure 3 shows the test results with all drivers active at  20kbps with typical rs-232 loads in parallel with a  000pf capacitors. figure 4 shows the test results where one driver was active at 250kbps and all three drivers loaded with an rs-232 receiver in parallel with a 000pf capacitor. the transmitter inputs do not have pull-up resistors. connect unused inputs to ground or v l . receivers the receivers convert 5.0v eia/tia-232 levels to ttl or cmos logic output levels. receivers are disabled when in shutdown. the truth table logic of the sp3203e driver and receiver outputs can be found in table . since receiver input is usually from a trans - mission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 500mv. this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k? pull-down resistor to ground will commit the output of the receiver to a high state. charge pump the charge pump is a patented design (u.s. 5,306,954) and uses a unique approach compared to older lessCeffcient designs. the charge pump still requires four external capacitors, but uses a fourCphase voltage shifting technique to attain symmetrical 5.5v power supplies. the internal power supply consists of a regulated dual charge pump that provides output voltages of +/-5.5v regardless of input voltage (v cc ) over the +3.0v to +5.5v range. this is important to maintain compliant rs- 232 levels regardless of power supply fuctuations.
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 8 the charge pump operates in a discontinu - ous mode using an internal oscillator. if the output voltages are less than a magnitude of 5.5v, the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v, the charge pump is disabled. this oscillator controls the four phases of the voltage shift - ing. a description of each phase follows. phase 1 v ss charge storage during this phase of the clock cycle, the positive side of capaci - tors c  and c 2 are initially charged to v cc . c l + is then switched to gnd and the charge in c  C is transferred to c 2 C . since c 2 + is con - nected to v cc , the voltage potential across capacitor c 2 is now 2 times v cc . phase 2 v ss transfer phase two of the clock connects the negative terminal of c 2 to the v ss storage capacitor and the positive terminal of c 2 to gnd. this transfers a negative gener - ated voltage to c 3 . this generated voltage is regulated to a minimum voltage of -5.5v. simultaneous with the transfer of the volt - age to c 3 , the positive side of capacitor c  is switched to v cc and the negative side is connected to gnd. phase 3 v dd charge storage the third phase of the clock is identical to the frst phase the charge transferred in c  produces Cv cc in the negative terminal of c  , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the voltage potential across c 2 is 2 times v cc . table 2. shutdown truth tables (note: when the device is shutdown, the sp3203e's charge pump is turned off and v+ decays to vcc, v- is pulled to ground and the transmitter outputs are disabled as high impedance.) figure 2. loopback test circuit for rs-232 driver data transmission rates phase 4 v dd transfer the fourth phase of the clock connects the negative terminal of c 2 to gnd, and transfers this positive generated voltage across c 2 to c 4 , the v dd storage capacitor. this voltage is regulated to +5.5v. at this voltage, the in - ternal oscillator is disabled. simultaneous with the transfer of the voltage to c 4 , the positive side of capacitor c  is switched to v cc and the negative side is switched to gnd, al - lowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. since both v + and v C are separately gener - ated from v cc , in a noCload condition v + and v C will be symmetrical. older charge pump approaches that generate v C from v + will show a decrease in the magnitude of v C compared to v + due to the inherent ineffciencies in the design. v l supply level device: sp3203e shutdown t x out r x out charge pump 0 high-z high-z inactive  active active active sp3203e 1 3 5 4 2 6 19 gnd t 1 in t x in c1+ c1- c2+ c2- v+ v- v cc + c2 c5 c1 + + c3 c4 + + 0.1f ttl/cmos inputs +3v to +5v 18 shutdo wn 20 5k ? r 1 out 5k ? r x in r x out ttl/cmos outputs r 1 in t x out t 1 out v cc 1000pf 1000pf 12 v l +3v to +5.5 v 0.1f 0.1f 0.1f 0.1f
9 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 current rs-232 serial transceivers are designed with fxed 5v to 3.3v ttl input/ output voltage levels. the v l function in the sp3203e allows the end user to set the ttl input/output voltage levels independent of vcc. by connecting v l to the main logic bus of system, the ttl input/output limits and thresholds are reset to interface with the on board low voltage logic circuitry. capacitor selection table: vcc (v) c (f) c2 - c4 (f) 3.0 to 3.6 0. 0. 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.22  figure 3. loopback test circuit result at 20kbps (all drivers fully loaded) ch1 ch3 3 1 2 t t t t [ ] t1 in t1 out r1 out 5.00v ch2 5.00v m 5.00m s ch1 0v 5.00v figure 4. loopback test circuit result at 250kbps (all drivers fully loaded) 3 1 2 t t t t [ ] t1 in t1 out r1 out ch1 ch3 5.00v ch2 5.00v m 2.50m s ch1 0v 5.00v
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 0 figure 5. charge pump - phase  figure 6. charge pump - phase 2 v cc = +5v ?5v ?5v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? v cc = +5v ?10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? ch1 2.00v ch2 2.00v m 1.00ms ch1 1.96v 2 1 t t [ ] t 2 +6v a) c 2+ b) c 2 - -6v 0v 0v figure 7. charge pump waveforms figure 8. charge pump - phase 3 v cc = +5v ?5v +5v ?5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? figure 9. charge pump - phase 4 v cc = +5v +10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ?
 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 6 7 8 9 1 2 3 4 5 db-9 connector 6. dce ready 7. request to send 8. clear to send 9. ring indicator db-9 connector pins: 1. receiv ed line signal detector 2. receiv ed data 3. tr ansmitted data 4. data te rm inal ready 5. signal ground (common) sp3203e 1 3 5 4 2 6 19 gnd c1+ c1- c2+ c2- v+ v- v cc 7 8 9 11 10 0.1f + c2 c5 c1 + + c3 c4 + + 17 16 15 14 13 18 t 1 in r 1 out r 1 in t 2 out t 2 in t 3 in t 3 out t 1 out r 2 in r 2 out 12 v l shutdown 20 0.1f 0.1f 0.1f 0.1f figure 0. circuit for the connectivity of the sp3203e with a db-9 connector
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 2 esd t olerance the sp3203e incorporates ruggedized esd cells on all driver output and re - ceiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. the improved esd tolerance is at least +  5kv without damage nor latch-up. there are different methods of esd testing applied: a) mil-std-883, method 305.7 b) iec6 000-4-2 air-discharge c) iec6000-4-2 direct contact the human body model has been the generally accepted esd testing method for semiconductors. this method is also specifed in mil-std-883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human bodys potential to store electro-static energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure  . this method will test the ics capability to withstand an esd transient during normal handling such as in manu - facturing areas where the ic's tend to be handled frequently. the iec-6  000-4-2, formerly iec80 -2, is generally used for testing esd on equipment and systems. for system manufacturers, they must guarantee a certain amount of esd protection since the system itself is ex - posed to the outside environment and human presence. the premise with iec6 000-4-2 is that the system is required to withstand an amount of static electricity when esd is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. the transceiver ic receives most of the esd current when the esd source is applied to the connector pins. the test circuit for iec6  000-4-2 is shown on figure  2. there are two methods within iec6  000-4-2, the air discharge method and the contact discharge method. with the air discharge method, an esd voltage is applied to the equipment under test (eut) through air. this simulates an electrically charged person ready to connect a cable onto the rear of the system only to fnd an unpleas - ant zap just before the person touches the back panel. the high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. this energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. variables with an air discharge such as approach speed of the object carrying the esd potential to the system and humidity will tend to change the discharge current. for example, the rise time of the discharge current varies with the approach speed. the contact discharge method applies the esd current directly to the eut. this method was devised to reduce the unpredictability of the esd arc. the discharge current rise time is constant since the energy is directly transferred without the air-gap arc. in situ - ations such as hand held systems, the esd charge can be directly discharged to the equipment from a person already holding the equipment. the current is transferred on to the keypad or the serial port of the equipment directly and then travels through the pcb and fnally to the ic. figure  . esd test circuit for human body model
3 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 device pin human b ody iec61000-4-2 tested model air discharge direct contact level driver outputs 5kv 5kv 8kv 4 receiver inputs 5kv 5kv 8kv 4 the circuit model in figures  and 2 repre - sent the typical esd testing circuit used for all three methods. the c s is initially charged with the dc power supply when the frst switch (sw  ) is on. now that the capacitor is charged, the second switch (sw2) is on while sw  switches off. the voltage stored in the capacitor is then applied through r s , the current limiting resistor, onto the device under test (dut). in esd tests, the sw2 switch is pulsed so that the device under test receives a duration of voltage. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k? an 100pf, respectively. for iec- 000-4-2, the current limiting resistor (r s ) and the source capacitor (c s ) are 330? an  50pf, respectively. the higher c s value and lower r s value in the iec6  000-4-2 model are more stringent than the human body model. the larger storage capacitor injects a higher voltage to the test point when sw2 is switched on. the lower current limiting resistor increases the current charge onto the test point. figure  3. esd test waveform for iec6000-4-2 t=0ns t=30ns 0a 5a 30a t i figure  2. esd test circuit for iec6000-4-2 table 4. transceiver esd tolerance levels
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 4 package: 20 pin tssop
5 exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 part number temperature range package types sp3203ecy-l ..................................................... 0c to +70c ------------------------------------------- 20-pin tssop sp3203ecy-l/tr ............................................... 0c to +70c ------------------------------------------- 20-pin tssop sp3203eey-l .................................................... -40c to +85c ------------------------------------------ 20-pin tssop sp3203eey-l/tr .............................................. -40c to +85c ------------------------------------------ 20-pin tssop note: "-l" indicates lead free packaging, "/tr" is for tape and reel option ordering information
exar corporation 48720 kato road, fremont ca, 94538 ? (50)668-70 7 ? www.exar.com sp3203e_00_2080 6 date revision description 03-0-05 --- legacy sipex datasheet dec 200 .0.0 convert to exar datasheet format and remove eol parts. revision history notice exar corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reliability. exar corporation assumes no representation that the circuits are free of patent infringement. charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specifc application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to signifcantly af fect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 200 exar corporation datasheet december 200 for technical support please email exar's serial technical support group at: serialtechsupport@exar.com reproduction, in part or whole, without the prior written consent of exar corporation is prohibited.


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